hello there,

is it potential create a two qsys system (see beneath system picture) with following system elements on one fpga?

sys1 elements: nios ii, onchip mem, spi 3 wire (config as grasp)

sys2 elements: nios ii, onchip mem, spi 3 wire (config as slave)

and have separate eclipse code for sys1 and sys2.

i want to check this in my DE10 NANO board.

i need this setup as a testbench to check my SPI grasp / slave communication code with out shopping for a one other DE10 nano.

if its potential, please give me some examples or tutorial hyperlink.