We’re at the moment conducting exams utilizing Arria 10 GX EVB.

Nevertheless, we’ve encountered a problem the place NIOS V controlling DDR4 by means of EMIF IP ends in a failure when making an attempt dynamic reminiscence allocation within the software program.

Unusually, this situation is resolved after we take away EMIF IP from the system.

Our system’s diagram is hooked up for reference.

Hooked up is the venture file used for testing.

Any steering or solutions could be significantly appreciated. Thanks!

Moreover, the preliminary drawback arose from our try so as to add EMIF IP management for DDR4 primarily based on Intel Easy Socket Server instance. Nevertheless, upon debugging, we discovered that the problem truly occurred throughout the preliminary dynamic reminiscence allocation, inflicting subsequent execution to fail resulting from pointer unavailability, leading to an “ethernet preliminary fail” message on the JTAG-UART terminal.